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Description: 基于FPGA的I2C总线控制器的设计论文2-The I2C bus controller design based on FPGA. 2
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Size: 3072 |
Author: 彭亮 |
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Description: fpga cpld verilog hdl 语言 代码程序
beep 控制
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Size: 619520 |
Author: 用彩色 |
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Description: 基于FPGA的I2C通信代码实现,在开发板上验证过,欢迎使用-FPGA-based I2C communication code, tested on the development board, welcome
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Size: 741376 |
Author: 岳振 |
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Description: 里面包含fpga的4个noic核 verilog(i2c,rs232,can,8051)。测试过不错-Which contains the four noic nuclear fpga verilog (i2c, rs232, can, 8051). Tested good
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Size: 9163776 |
Author: feixue |
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Description: I2C控制源码 用于摄像头的信号传输和控制。
在使用时FPGA需要接上上拉电阻否则无效-I2C control source signal transmission and control for the camera. When using the pull-up resistor connected FPGA requires otherwise invalid
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Size: 3072 |
Author: 张安 |
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Description: 代码中是用于实现基于FPGA的I2C的通信实验,可移植性强-Code is used to implement the FPGA based I2C communication experiment, portability strong
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Size: 2373632 |
Author: lincy_dd |
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Description: 该工程文件中代码是用于实现基于FPGA的I2C的通信实验,可移植性强-The project file code is used to implement an FPGA-based I2C communication experiment, the portability
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Size: 2377728 |
Author: lincy_dd |
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Description: 基于FPGA的IIC IP硬核设计 连接UC系统,用VHDL语言书写
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Size: 36864 |
Author: 岳才奇 |
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Description: FPGA的I2C源码,基于Altera QUartusII的开发环境。-I2C-source FPGA-based Altera QUartusII development environment.
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Size: 878592 |
Author: luoyuanhong |
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Description: i2c 总线 host 控制器 , fpga上验证过,可以实现i2c 通信。-verilog IP for i2c master controller
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Size: 978944 |
Author: guoqingsheng |
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Description: It s a VERILOG code to initiate a I2C protocol on an FPGA and an EEPROM of 512 KB
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Size: 135168 |
Author: yunta23 |
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Description: fpga verilog IIC 已经调试通过-fpga verilog IIC
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Size: 10240 |
Author: 建邺区 |
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Description: FPGA I2C i2c_slave_model code verilog
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Size: 3072 |
Author: lrihuan |
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Description: FPGA I2C主机FPGA代码 verilog-FPGA I2C host FPGA code verilog
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Size: 2048 |
Author: lrihuan |
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Description: Verilig语言描述的I2C Mater控制器的IP核,已经过实践应用,适合于FPGA I2C接口设计应用。本IP核在Altera QII 15.1软件环境下综合,并且包含基于NiosII Gen2处理器的i2c软件驱动代码。-Verilig language I2C Mater described controller IP core, has been the practical application, suitable for FPGA I2C interface design applications. The IP core at Altera QII 15.1 integrated software environment and includes a processor based on the i2c NiosII Gen2 software driver code.
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Size: 214016 |
Author: zhang |
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Description: fpga实现i2C通信程序,工程文件可以直接用ISE打开-FPGA implementation of i2C communication program
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Size: 211968 |
Author: 虞欣 |
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Description: I2C接口FPGA程序,在VIVADO平台实现,已在硬件验证-The I2C interface FPGA program, implementation, the VIVADO platform was validated in the hardware
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Size: 8460288 |
Author: jason |
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Description: FPGA的I2C模块实例代码,有说明文档,值得参考啦-FPGA I2C Model Sample Code Docs
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Size: 215040 |
Author: zht |
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Description: uc/os operation system,which is used in FPGA nios ii.
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Size: 17695744 |
Author: niukang |
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Description: FPGA I2C的IP核控制,可以用modelsim直接仿真,观察信号。-IP core for I2C of FPGA,able to simulate with modelsim and check the signal
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Size: 8038400 |
Author: terran2831 |
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